74AHC595Q

The 74AHC595Q is an 8-bit serial-in/serial-out or parallel-out shift register with 3-state controlled outputs designed for 2.0V to 5.5V V_CC operation. 

The device integrates an 8-bit shift register and an 8-bit D-type storage register. The storage register features parallel 3-state outputs. The shift register provides a clear input (SRCLR) with direct overriding function, a serial input (SER) and a serial output (Q_H') to implement cascading. When output enable input (OE) is held low, the data in storage register will appear at the outputs. When OE is held high, all outputs except Q_H' are in high-impedance state. 

Both the shift register and storage register have separate clocks. The shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If the SRCLK and RCLK are connected together, the shift register always leads one clock pulse than the storage register all the time. 

The device is AEC-Q100 qualified (Automotive Electronics Council (AEC) standard Q100 Grade 1) and it is suitable for automotive applications. 

The 74AHC595Q is available in a Green TSSOP-16 package. It operates over an operating temperature range of -40℃ to +125℃.