74HC595Q

The 74HC595Q and 74HCT595Q are 8-bit serial-in/serial-out or parallel-out shift registers with 3-state controlled outputs designed for power supply voltage ranges of 2.0V to 5.5V and 4.5V to 5.5V respectively. These devices integrate an 8-bit shift register, an 8-bit storage register, and parallel 3-state outputs respectively. 

The shift register provides a master reset input (MR), a serial input (DS) and a serial output (Q7S) for cascading. All of the 8 shift register stages have the asynchronous reset function when MR is low. 

Both the shift register and storage register have separate clocks. The shift register clock (SHCP) is positive-edge triggered. Data is shifted on the positive-going transition of the SHCP. The storage register clock (STCP) is also positive-edge triggered. The data in each shift register is transferred to the storage register on the positive-going transition of the STCP. If the SHCP and STCP are connected together, the shift register always leads one clock pulse than the storage register all the time. The output enable OE input is active-low. When OE is held low, the data in storage register appears at the outputs. When OE is held high, all parallel outputs are in high-impedance state. OE has no influence on the inner working of the registers. The clamp diodes of inputs allow the use of current limiting resistors to connect inputs to the voltage exceeding supply voltage. 

These devices are AEC-Q100 qualified (Automotive Electronics Council (AEC) standard Q100 Grade 1) and they are suitable for automotive applications. 

The 74HC595Q and 74HCT595Q are available in Green TSSOP-16 and SOIC-16 packages. They operate over an operating temperature range of -40℃ to +125℃.